This invention relates generally to computer processor operation, and more particularly to providing a method, system, and computer program product for managing cache memory.
In order to reduce or avoid the time delay (or “latency”) of accessing data stored in the main memory of a computer, modern computer processors include a cache memory (or “cache”) that stores recently accessed data so that it can be quickly accessed again by the processor. Data that is stored in a cache can be quickly accessed by a processor without the need to access the main memory (or “memory”), thereby increasing the performance of the processor and the computer overall. However, since a cache memory is usually a fraction of the size of a main memory, a limited amount of data can be stored in the cache, and existing (i.e., currently stored) data is evicted (i.e., removed) from the cache to provide space for newly stored data when the cache is full. Therefore, efficiently managing the storage of data in a cache is desirable to maximize the benefits of using a cache.
In that regard, a cache replacement policy is an example of a way to efficiently manage the storage of data in a cache. For example, when data is added to a cache, it is not known if the data will be accessed more than once (if at all) by the computer processor. If the data will be accessed just once (or not at all), it is desirable for the data to be evicted from the cache as soon as possible, whereas if the data will be accessed more than once, it is desirable for the data to be retained in the cache for at least as long as it is needed. A cache replacement policy attempts to address this desired cache management by organizing data for retention or eviction based on a designation of the least recently used data (“LRU”) or the most recently used data (“MRU”). However, data is typically transferred and accessed in groupings known as cache lines, which may include more than one item of data. Furthermore, two or more items of data may be accessed in succession in a data “stream”, which may be contained in a single cache line or span to other (“sequential”) cache lines.
Thus, based on the cache replacement policy, when data (e.g., an item or stream of data) is first added to the cache, the cache line it is included in is designated as the LRU, and when data is accessed by the processor after being added to the cache, the cache line it is included in is designated as the MRU, while other cache lines of data in the cache may be organized between the LRU and the MRU (e.g., in an ordered queue). The LRU cache line will be the most likely candidate to be evicted from the cache, while the MRU cache line will be the most likely candidate to be retained in the cache. However, since the single access of a data stream may cause a repeated access of the same cache line (i.e., to access each item of data in the stream), a cache line may be designated as the MRU even though the data stream it contains is accessed just once and, thus, the cache line will not be accessed more than once for a unique data access. Therefore, it is desirable to have cache management that distinguishes between repeated accesses of a cache line for unique accesses of data and repeated accesses of a cache line for a single access of data such as a data stream.